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Analog Circuits Sectional Test One

Q. No. 1 - 10 Carry One Mark Each
1. In the circuit shown below, D1 and D2 are ideal diodes. The current i1 and i2 respectively is

Analog Circuit EC-ID-1310_Q1
(A) 0, 4 mA    (B) 4 mA, 0    (C) 0, 8 mA    (D) 8 mA, 0

Correct Answer : A

Solve-1. The voltage across the anode terminal of diode D1 is less than the voltage across cathode terminal. Therefore, VC>VA. Diode D1 reverse biased i1=0. Therefore D2 is forward biased, and i2=52500=4mA
Analog Circuit EC-ID-1310_Q1
2. What is the status of the ideal diodes of the circuit shown below?
Analog Circuit EC-ID-1310_Q2
(A) D1 ON, D2 OFF    (B) D1 OFF, D2 ON    (C) D1 ON, D2 ON    (D) D1 OFF, D2 OFF

Correct Answer : A

Solve-2. Analyzing the circuit, we can see that D1 forward bias and D2 is in reverse bias. But no current flow through D2, because current choose shortest path through D1. (Current choose always low resistance path only)
3. Class AB operation is often used in power (large signal) amplifier in order to

(A) Get maximum efficiency    (B) Remove even harmonics    (C) Overcome cross over distortion    (D) Reduce collector dissipation

Correct Answer : C

Solve-3. Class AB operation is used in power amplifier in order to overcome cross-over distortion.
4. Compared to full wave rectifier using 2 diodes, 4 diode bridge rectifiers has dominant advantage of

(A) Higher current carrying capacity    (B) Lower peak inverse voltage requirement    (C) Lower ripple voltage    (D) Higher efficiency

Correct Answer : B
5. A relaxation oscillator is one which

(A) Has two stable states    (B) Oscillates continuously    (C) Relaxes indefinitely    (D) produces non-sinusoidal output

Correct Answer : D

Solve-5. A relaxation oscillator is one which produces non-sinusoidal output.
6. The circuit shown in the figure represents a
Analog Circuit EC-ID-1310_Q6
(A) Low pass filter    (B) High pass filter    (C) Band pass filter    (D) Band stop filter

Correct Answer : B

Solve-6. The figure shown in the problem is High Pass Filter.
7. When two identical stages, with upper cut off frequency ωn are cascaded the overall upper cutoff point will be at

(A) ωn (B) 2 ωn (C) 0.5 ωn (D) 0.64 ωn

Correct Answer : D

Solve-7. fH=fH2121 ; Where n = number of stages; fH = individual amplifier's upper cut off frequency; fH = overall upper cut off frequency. Here n = 2, fH=ωn, fH=fH2121=0.64ωn.
8. A two stage amplifier is required to have an upper cutoff frequency of 2 MHz and a lower cutoff frequency of 30 MHz. The upper and lower cutoff frequency of individual stage are respectively are

(A) 4 MHZ, 60 MHz    (5) 3 MHz, 20 MHz    (C) 3 MHZ, 60 MHz    (D) 4 MHz, 20 MHz

Correct Answer : B

Solve-8. We know that fL=fL21n1 and fH=fH21n1, n = 2 (given)
30 = fL0.64fL=30×0.64 = 19.2 20 MHz
2MHz = fH2121fH=2MHz0.64= 3.125MHz 3MHz
9. If the power input to the amplifier is 2 μW and the power gain of the amplifier is 400 dB, then the output power of the amplifier is _____ (mW).

Correct Answer : From: 20.2 To: 19.8

Solve-9. 10log10A=40; A = 104, Po=PiA=20mW
10. The power output to an amplifier is 2 watts at 5 KHz, and 0.5 watts at 50 Hz. If input power is constant at 10 mW, the variation of power gain in dB at the given frequencies is _________ (dB)

Correct Answer : From: 6.06 To: 5.94

Solve-10. At 5 kHz P01 = 2W, At 50 kHz P02 = 0.5W
Variation of power gain = 10log10P01P02= 10log1020.5= 10log104= 6dB
Q. No. 11 - 20 Carry Two Mark Each
11. The value of Vo, for op-amp circuit shown below is
Analog Circuit EC-ID-1310_Q11
(A) -2V    (B) -1V    (C) -0.5V    (D) 0.5V

Correct Answer : C

Solve-11. The giver Op-amp is a combination of both inverting and non inverting OP-amp's
In inverting Vo=RFR1Vi, in non inverting Vo=(1+RFR1)Vi
Here Vi = 1V
The Thevenin's voltage accross '+' terminal is V_{th} = \frac {1 \times 1KΩ}{2KΩ} = \frac {1}{2} = 0.5V
In non inverting OP-amp, V_o = 0.5(1 + \frac {2}{1}) \implies V_o = 3 \times 0.5 = 1.5V
In inverting Op-amp V_o = -\frac {2}{1} \times 1 = -2V
12. The given figure shows a silicon transistor connected as a common emitter amplifier, the quiescent collector voltage of the circuit approximately as
Analog Circuit EC-ID-1310_Q12
(A) \frac {20}{3}V    (B) 11V    (C) 14V    (D) 20V

Correct Answer : C

Solve-12. Since transistor is in saturation
I_C = \frac {20 - 0.2}{R_C + R_E + \frac {R_E}{β}} = 1.3mA
I_B = \frac {20 - 0.7}{100K + 1 + 100 \times 10K} = 17.38μA
\therefore I_B > \frac {I_C}{β} \implies Transistor is in saturation
\therefore V_C = 20 - 1.3mA \times 5K = 13.5 \simeq 14V
13. An amplifier with an initial open loop gain of 400 is used as a negative feedback amplifier. The feedback factor is 0.05. If the gain of the amplifier changes 10% due to temperature, then the closed loop gain will changes approximately by

(A) 0.05 %    (B) 0.1 %    (C) 0.5 %    (D)1 %

Correct Answer : C

Solve-13. We know that \frac {\Delta A_f}{A_f} = \frac {dA}{A} \frac {1}{1 + Aβ} ; \frac {dA}{A}, β, A values are given
So, \frac {dA_f}{A_f} = ( \frac {10}{100} ) \times \frac {1}{1 + 400 \times 0.05} \times 100 = 0.5%
14. An op-amp has a slew rate of 5V/μs. The largest sine wave output voltage possible at a frequency of 1 MHz is

(A) 10π Volts    (B) 5 Volts    (C) \frac {5}{π} Volts    (D) \frac {5}{2π} Volts

Correct Answer : D

Solve-14. We know the relationship between signal voltage and S.R is 2πKf ≤ SR
Here, K = Signal voltage and f = frequency
K ≤ \frac {S.R}{2πf} \implies K ≤ \frac {5 \times 10^6}{2π \times 10^6} , k = \frac {5}{2π}Volts
15. An op-amp with input voltage of V_{i1} = 150μV, V_{i2} = 140μV and if the differential amplifier has a differential gain of A_d = 4000 and the value of CMRR is 100. Then the output voltage of op-amp is ____(mV).

Correct Answer : From: 46.258 To: 45.342

Solve-15. V_o = A_dV_d (1 + \frac {1}{CMRR} \frac {V_C}{V_d})
Here V_d = V_{i1} - V_{i2} = 150 -140 = 10μV, V_c = \frac {V_{i1} + V_{i2}}{2} = \frac {150 + 140}{2} = 145μV
V_o = 4000 \times 10μV(1 + \frac {1}{100} \times \frac {145}{10}) = 0.04 + \frac {0.04 \times 145}{1000} = 0.04 + 5.8 \times 10^{-3} = 0.0458
V_o = 45.8mV
16. Total offset voltage for the circuit shown below with given input offset voltage V_{IO} = 4mV and the input offset current I_{IO} = 150nA will be ____ (mV).
Analog Circuit EC-ID-1310_Q16
Correct Answer : From: 483.79 To: 474.21

Solve-16. Offset voltage due to V_{IO} = V_{IO}(\frac {R_1 - R_f}{R_1}) = 4mV(1 + \frac {500}{5}) = 404mV
Output voltage due to offset current is = I_{IO}R_f = 150 \times 10^{-9} \times 500KΩ = 75mV
Total offset = 404 + 75 = 479mV
Common Data Questions: 17 and 18
An RC phase shift oscillator designed using FET having g_m = 5000μs, r_d = 40KΩ and the feedback circuit value of R = 10K. Gain of the amplifier A = 40.


17. The value of 'C' for oscillator at 1KHz is ____ (nF).

Correct Answer : From: 6.565 To: 6.435

18. The value of R_D required is ____ (KΩ)

Correct Answer : From: 10.1 To: 9.9

Solve-17 and 18. f = \frac {1}{2πRC\sqrt 6}
C = \frac {1}{6.28 \times 10K \times 1K \times \sqrt 6} = 6.5nF
\because A = 40 = g_mR_L \implies R_L = \frac {40}{5000μs} = 8KΩ
And alse R_L = \frac {R_Dr_d}{r_d + R_D} = 8K
\implies R_D = 10KΩ
Statement for Linked Answer Questions: 19 and 20
In the amplifier circuit shown in the figure, the values of R_1 and R_2 are such that the transistor is operating at V_{CE} = 3V and I_C = 1.5mA when it's β is 150.
Analog Circuit EC-ID-1310_Q19

19. If the β of the transistor is 200, the operating collector current I_C is

(A) 2mA    (B) 3mA    (C) 1mA    (D) 4mA

Correct Answer : A

20. If the β of the transistor is 200, then the operating voltage V_CE (in volts) is

(A) 2V    (B) 3V    (C) 4V    (D) 5V

Correct Answer : A

Solve-19 and 20. The given circuit is in fixed bias stabilization method. Apply KVL to outer loop then
V_{CC} - I_CR_C - V_{CE} = 0, R_C = \frac {V_{CC} - V_{CE}}{I_C} = \frac {6 -3}{1.5mA} = \frac {3}{1.5} \times 1000 = 2kΩ
And we know that I_C = βI_B
I_B = \frac {I_C}{β} = \frac {1.5mA}{150} = 10μA
Apply KVL to inner loop
V_{CC} - I_BR_B - V_{BE} = 0 . For active region V_{BE} = 0.7
\implies R_B = R_1 = \frac {V_{CC} - V_{BE}}{I_B} = \frac {6 - 0.7}{10μA} = 0.53 \times 10^6 = 530KΩ
Then, given β is changed from 150 to 200.
So, I_C = βI_B = 200 \times 10μA = 2mA
By applying KVL to outer loop we can get V_{CEQ}
\implies V_{CC} - I_CR_C - V_{CEQ} = 0 \implies V_{CEQ} = 6 - 2 \times 2 = 6 - 4 = 2V